US 12,482,730 B2
Package for a lateral power transistor
Stefan Wötzel, Erfurt (DE); and Marcus Böhm, Mintraching (DE)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies Austria AG, Villach (AT)
Filed on Nov. 22, 2022, as Appl. No. 17/992,098.
Claims priority of application No. 21212169 (EP), filed on Dec. 3, 2021.
Prior Publication US 2023/0178462 A1, Jun. 8, 2023
Int. Cl. H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 23/528 (2006.01); H02M 3/158 (2006.01)
CPC H01L 23/49562 (2013.01) [H01L 23/3107 (2013.01); H01L 23/528 (2013.01); H02M 3/158 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A transistor package, comprising:
a semiconductor transistor chip having a first surface and a second surface opposite the first surface, the semiconductor transistor chip comprising one or a plurality of first load electrodes, one or a plurality of second load electrodes and a control electrode on the first surface; and
a leadframe facing the first surface of the semiconductor transistor chip, the leadframe comprising a first terminal, a second terminal and a control terminal of the transistor package, the first terminal, the second terminal and the control terminal being exposed at a bottom of the transistor package,
wherein the first terminal is electrically coupled to the one or a plurality of first load electrodes,
wherein the second terminal is electrically coupled to the one or a plurality of second load electrodes,
wherein the control terminal is electrically coupled to the control electrode,
wherein the first terminal extends to and is exposed at first side of the transistor package,
wherein the second terminal extends to and is exposed at a second side opposite the first side of the transistor package,
wherein the control terminal extends to and is exposed at a third side of the transistor package “after” control electrode,
wherein the third side of the transistor package connects between the first side and the second side of the transistor package.