US 12,482,724 B2
Package structure and package system
Hao Peng, Shanghai (CN); and Xiaojing Liao, Shanghai (CN)
Assigned to Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed by Huawei Technologies Co., Ltd., Guangdong (CN)
Filed on Jul. 12, 2022, as Appl. No. 17/863,047.
Claims priority of application No. 202110788134.4 (CN), filed on Jul. 13, 2021.
Prior Publication US 2023/0018603 A1, Jan. 19, 2023
Int. Cl. H01L 23/482 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 23/31 (2006.01); H01L 23/373 (2006.01)
CPC H01L 23/482 (2013.01) [H01L 23/5386 (2013.01); H01L 24/20 (2013.01); H01L 24/24 (2013.01); H01L 23/3121 (2013.01); H01L 23/3735 (2013.01); H01L 2224/214 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/24175 (2013.01); H01L 2224/24227 (2013.01); H01L 2224/24247 (2013.01); H01L 2224/244 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/1517 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A package structure, comprising:
a package base layer having a first surface and a second surface that are opposite to each other;
one or more chips coupled to the first surface and one or more chip pads omitting using a pin, each chip of the one or more chips including a chip pad of the one or more chip pads on a surface of the chip away from the package base layer, wherein two chips of the one or more chips comprises a first subchip and a second subchip, wherein a thickness of the first subchip is less than a thickness of the second subchip, wherein the first surface of the package base layer has an accommodating groove for embedding only the second subchip, wherein the first subchip is on the first surface of the package base layer, wherein the second subchip is directly disposed in the accommodating groove, and wherein a surface that is of the first subchip and that is away from the package base layer is kept flush with a surface that is of the second subchip and that is away from the package base layer;
a connecting assembly including one or more metal vias;
a metal block disposed on the first surface connecting to at least one of the one or more metal vias, wherein a surface of the metal block away from the package base layer is coplanar with a surface of the chip pad away from the package base layer, such that the one or more metal vias have a consistent depth; and
a package body covering the package base layer and the one or more chips, wherein the one or more chip pads are wired to a surface of the package body through the connecting assembly.