| CPC H01L 21/78 (2013.01) | 8 Claims |

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1. A wafer processing method by which a wafer in which a plurality of devices are formed on a front surface in such a manner as to be marked out by a plurality of planned dividing lines that intersect is divided into individual device chips, the wafer processing method comprising:
a shield tunnel forming step of executing irradiation with a laser beam with a wavelength having transmissibility with respect to the wafer to form shield tunnels each including a fine pore and a modified tube that surrounds the fine pore; and
a dividing step of applying an external force to the wafer to divide the wafer into the individual device chips after executing the shield tunnel forming step, wherein the shield tunnel forming step includes a first shield tunnel forming step of successively forming the shield tunnels in one planned dividing line with interposition of at least intervals corresponding to one shield tunnel, and a second shield tunnel forming step of successively forming the shield tunnels in regions in which the intervals are provided in the planned dividing line,
wherein approximately half of the length of the shield tunnels formed in the second shield tunnel forming step overlaps the shield tunnels formed in the first shield tunnel forming step in a thickness direction of the wafer.
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7. A wafer processing method by which a wafer in which a plurality of devices are formed on a front surface in such a manner as to be marked out by a plurality of planned dividing lines that intersect is divided into individual device chips, the wafer processing method comprising:
a shield tunnel forming step of executing irradiation with a laser beam with a wavelength having transmissibility with respect to the wafer to form a plurality of shield tunnels each including a fine pore and a modified tube that surrounds the fine pore; and
a dividing step of applying an external force to the wafer to divide the wafer into the individual device chips after executing the shield tunnel forming step, wherein
the shield tunnel forming step includes
a first shield tunnel forming step of successively forming a plurality of first shield tunnels in one planned dividing line with interposition of at least intervals corresponding to one shield tunnel, and
a second shield tunnel forming step of successively forming a plurality of second shield tunnels in regions in which the intervals are provided in the planned dividing line,
wherein the first shield tunnels and the second shield tunnels have a same predetermined length in the thickness direction of the wafer, and the first shield tunnels and the second shield tunnels overlap along the entire predetermined length.
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