| CPC H01L 21/6833 (2013.01) [C23C 16/4583 (2013.01); H01L 21/683 (2013.01)] | 20 Claims |
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1. A substrate processing apparatus, comprising:
a chamber providing a space where a semiconductor process is performed on a semiconductor substrate;
a substrate plate within the chamber and configured to support the semiconductor substrate, the substrate plate comprising a central region and a peripheral region extending around the central region;
a central embossing pattern on the central region of the substrate plate and configured to support a central portion of the semiconductor substrate;
a plurality of first embossing patterns on the peripheral region of the substrate plate in circumferentially spaced apart relationship, each of the plurality of first embossing patterns extending radially outward from the central embossing pattern and having a first length; and
a plurality of second embossing patterns on the peripheral region of the substrate plate, each of the plurality of second embossing patterns located between adjacent ones of the first embossing patterns, each of the plurality of second embossing patterns extending radially outward from the central embossing pattern and having a second length that is less than the first length,
wherein an end portion of each of the first and second embossing patterns that faces the central embossing pattern has a curved shape.
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