US 12,482,516 B2
Circuit for receiving data and memory
Bingxin Wei, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Aug. 13, 2023, as Appl. No. 18/448,944.
Application 18/448,944 is a continuation of application No. PCT/CN2022/123902, filed on Oct. 8, 2022.
Claims priority of application No. 202210998008.6 (CN), filed on Aug. 19, 2022.
Prior Publication US 2024/0062807 A1, Feb. 22, 2024
Int. Cl. G11C 11/00 (2006.01); G11C 11/4074 (2006.01); G11C 11/4093 (2006.01)
CPC G11C 11/4093 (2013.01) [G11C 11/4074 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A circuit for receiving data comprising:
a voltage generating circuit, configured to output, in a first mode, a first reference voltage signal and a second reference voltage signal, wherein a voltage value of the first reference voltage signal is different from a voltage of the second reference voltage signal;
a data circuit, configured to receive a data signal, the first reference voltage signal, and the second reference voltage signal, compare the data signal with the first reference voltage signal, output a first target signal, compare the data signal with the second reference voltage signal, and output a second target signal, wherein the data signal is one of a plurality of data signals arranged in series; and
a selection circuit, configured to receive the first target signal and the second target signal and determine one of the first target signal and the second target signal as a target data signal based on a level state of a previous data signal of the data signal;
wherein the voltage generating circuit is further configured to output, in a second mode, a third reference voltage signal, wherein a voltage value of the third reference voltage signal is between the voltage value of the first reference voltage signal and the voltage value of the second reference voltage signal, and
the data circuit is further configured to receive the third reference voltage signal, compare the data signal with the third reference voltage signal, and output the target data signal;
wherein the voltage generating circuit comprises:
a first voltage generating circuit, configured to receive a first control signal group, and output, in the first mode, a first weak voltage signal and a second weak voltage signal based on the first control signal group;
a second voltage generating circuit, configured to receive a second control signal group, and output, in the first mode, a first strong voltage signal and a second strong voltage signal based on the second control signal group;
a first selector, configured to receive an intensity selection signal, the first weak voltage signal, and the first strong voltage signal, output the first strong voltage signal as the first reference voltage signal when the intensity selection signal is in a first state, or output the first weak voltage signal as the first reference voltage signal when the intensity selection signal is in a second state; and
a second selector, configured to receive the intensity selection signal, the second weak voltage signal and the second strong voltage signal, and output the second strong voltage signal as the second reference voltage signal when the intensity selection signal is in the first state, or output the second weak voltage signal as the second reference voltage signal when the intensity selection signal is in the second state,
wherein a driving strength of the first strong voltage signal is greater than a driving strength of the first weak voltage signal, and a driving strength of the second strong voltage signal is greater than a driving strength of the second weak voltage signal.