| CPC G09G 3/3275 (2013.01) [G09G 2310/0297 (2013.01); G09G 2310/08 (2013.01)] | 13 Claims |
|
1. A display device comprising:
a main area including a display area in which emission areas are disposed and a non-display area disposed around the display area;
a sub-area protruding from a side of the main area;
a circuit layer disposed on a substrate, the circuit layer including emission pixel drivers electrically connected to light emitting elements of the emission areas, respectively, and data lines transferring data signals of the emission pixel drivers;
a data driver generating the data signals of the emission pixel drivers; and
a demultiplexer circuit electrically connected between the data driver and the data lines, the demultiplexer circuit including a first demultiplexer transistor turned on by a first demultiplexer control signal and a second demultiplexer transistor turned on by a second demultiplexer control signal, wherein
a first data line of the data lines is electrically connected to the data driver through the first demultiplexer transistor, the first data line including a transfer path shorter than a first extension length,
a second data line of the data lines is electrically connected to the data driver through the second demultiplexer transistor, the second data line including a transfer path longer than or equal to the first extension length, and
a data signal of the second data line includes a compensation value corresponding to the first extension length, wherein
the first demultiplexer control signal is supplied during a first period of each image frame period, and
the second demultiplexer control signal is supplied during a second period after the first period of each image frame period.
|