US 12,481,616 B2
RDMA NIC utilizing packet level request and response interleaving
Brian Hausauer, Austin, TX (US); David Arditti Ilitzky, Zapopan (MX); and Linghe Wang, Austin, TX (US)
Assigned to DreamBig Semiconductor, Inc., San Jose, CA (US)
Filed by DreamBig Semiconductor, Inc., San Jose, CA (US)
Filed on Mar. 14, 2024, as Appl. No. 18/605,520.
Claims priority of provisional application 63/513,873, filed on Jul. 15, 2023.
Claims priority of provisional application 63/490,660, filed on Mar. 16, 2023.
Prior Publication US 2024/0314203 A1, Sep. 19, 2024
Int. Cl. G06F 15/173 (2006.01); G06F 13/28 (2006.01); H04L 67/1097 (2022.01); H04L 69/16 (2022.01); H04L 69/22 (2022.01)
CPC G06F 15/17331 (2013.01) [G06F 13/28 (2013.01); H04L 67/1097 (2013.01); H04L 69/161 (2013.01); H04L 69/22 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A remote direct memory access (RDMA) network interface controller (NIC) for connection to a network to communicate with a remote RDMA NIC by providing request messages and response messages to the remote RDMA NIC, the RDMA NIC comprising:
a network interface for connection to the network;
an RDMA NIC processor coupled to the network interface;
RDMA header processing logic which builds RDMA packet headers to include values identifying individual packets in request packet flows and response packet flows so that request message packets can be interleaved with response message packets on a packet basis without ambiguity and allowing packet reliability operations;
RDMA NIC memory coupled to the RDMA NIC processor, the RDMA header processing logic and the network interface; and
RDMA NIC non-transitory storage for programs to execute from the RDMA NIC memory on the RDMA NIC processor.