US 12,481,604 B2
Integrated chiplet-based central processing units with accelerators for system security
Harikrishna Madadi Reddy, San Jose, CA (US); Yunqing Chen, Los Altos, CA (US); Baheerathan Anandharengan, Milpitas, CA (US); and Christian Markus Petersen, Golden, CO (US)
Assigned to Meta Platforms, Inc., Menlo Park, CA (US)
Filed by Meta Platforms, Inc., Menlo Park, CA (US)
Filed on Apr. 13, 2023, as Appl. No. 18/134,088.
Claims priority of provisional application 63/436,543, filed on Dec. 31, 2022.
Prior Publication US 2024/0220624 A1, Jul. 4, 2024
Int. Cl. G06F 13/16 (2006.01); G06F 21/44 (2013.01); G06F 21/57 (2013.01); H04N 19/436 (2014.01); H04N 19/85 (2014.01)
CPC G06F 13/1663 (2013.01) [G06F 21/44 (2013.01); G06F 21/572 (2013.01); H04N 19/436 (2014.11); H04N 19/85 (2014.11); G06F 2213/1602 (2013.01); G06F 2221/033 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer-implemented method, comprising:
receiving, at a security agent of a host central processing unit (CPU), accelerator firmware from flash memory;
determining, at the security agent, whether the accelerator firmware includes a critical accelerator firmware component or a non-critical accelerator firmware component;
authenticating, at the security agent, the critical accelerator firmware component instantaneously upon a determination that the accelerator firmware is the critical accelerator firmware component, wherein authenticating the critical accelerator firmware component yields an authenticated critical accelerator firmware component; and
providing the authenticated critical accelerator firmware component to an accelerator via a sideband bus for execution at the accelerator.