US 12,481,596 B2
Efficient offloading of background operations
Madhu Yashwanth Boenapalli, Hyderabad (IN); Surendra Paravada, Hyderabad (IN); and Sai Praneeth Sreeram, Anantapur (IN)
Assigned to Qualcomm Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Dec. 3, 2022, as Appl. No. 18/061,451.
Prior Publication US 2024/0184711 A1, Jun. 6, 2024
Int. Cl. G06F 12/1009 (2016.01)
CPC G06F 12/1009 (2013.01) [G06F 2212/1016 (2013.01)] 28 Claims
OG exemplary drawing
 
1. A computing device, comprising:
a host controller configured to:
determine an operating state of the host controller, wherein the operating state comprises an available operating state or a busy operating state;
enable a host performance booster (HPB) mode in which a logical-to-physical (L2P) address mapping table, associated with one or more physical addresses in a universal flash storage (UFS) device, is maintained in a host memory associated with the host controller;
enable a device control mode (DCM) of the HPB mode based on the host controller being in the busy operating state, wherein in the DCM, a memory device controller of the UFS device indicates active or inactive subregions of the L2P address mapping table; and
receive, in the DCM, a notification from the memory device controller indicating to activate or deactivate at least one subregion of the L2P address mapping table maintained in the host memory of the host controller.