US 12,481,578 B2
Data loss protection for memory systems and devices
Amichai Givant, Rosh-Ha'ain (IL); Yoav Yogev, Mazkeret-Batya (IL); Shivananda Shetty, Fremont, CA (US); Stefano Amato, San Jose, CA (US); Itzic Cohen, Netanya (IL); Idan Koren, Kiryat Ono (IL); and Yair Sofer, Tel-Aviv (IL)
Assigned to Infineon Technologies LLC, San Jose, CA (US)
Filed by Infineon Technologies LLC, San Jose, CA (US)
Filed on Oct. 12, 2023, as Appl. No. 18/379,331.
Claims priority of provisional application 63/449,644, filed on Mar. 3, 2023.
Prior Publication US 2024/0296115 A1, Sep. 5, 2024
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 12/02 (2006.01)
CPC G06F 12/023 (2013.01) [G06F 11/073 (2013.01); G06F 11/0769 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a non-volatile memory device comprising:
a first data unit comprising a first plurality of memory cells configured to store data for the non-volatile memory device and associated metadata;
a second data unit comprising a second plurality of memory cells configured to store data for the non-volatile memory device and associated metadata, wherein the first data unit and second data unit are configured to alternate storing a most recent version of the data and associated metadata, and wherein the data comprises configuration data for the non-volatile memory device; and
control circuitry comprising implemented logic configured to:
read metadata from the first data unit and the second data unit;
identify the first data unit as an inactive data unit based on contents of the first data unit and the second data unit; and
perform one or more update operations such that the first data unit is updated and set as an active unit when the update operations are complete, wherein the active unit is a currently active data unit used to store current configuration data for the non-volatile memory device.