US 12,481,549 B1
Communication error handling in a memory sub-system
He Sang, Shanghai (CN); Liang Hua, Shanghai (CN); Xiaolong He, Shanghai (CN); Chao Ye, Shanghai (CN); and Baojian Wang, Shanghai (CN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 30, 2024, as Appl. No. 18/789,425.
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01)
CPC G06F 11/0793 (2013.01) [G06F 11/0709 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory sub-system comprising:
a memory device;
a processing device coupled to the memory device, the processing device to perform operations comprising:
detecting a communication error between a memory sub-system controller and the memory device;
based on detecting the communication error, suspending execution of command processing by the memory sub-system controller;
storing command data comprising a snapshot of a command queue of the memory sub-system controller, the command queue comprising one or more commands;
flushing the command queue;
returning the memory sub-system to a normal state of operation;
performing one or more recovery actions to attempt recovery of the memory device;
determining whether recovery of the memory device was successful;
based on determining recovery of the memory device is unsuccessful, marking affected portions of the memory device as retired; and
reissuing the one or more commands from the command queue.