US 12,481,502 B2
Cryptographic computing with context information for transient side channel security
Abhishek Basak, Bothell, WA (US); Salmin Sultana, Hillsboro, OR (US); Santosh Ghosh, Hillsboro, OR (US); Michael D. LeMay, Hillsboro, OR (US); Karanvir S. Grewal, Hillsboro, OR (US); and David M. Durham, Beaverton, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 10, 2021, as Appl. No. 17/547,875.
Prior Publication US 2022/0100907 A1, Mar. 31, 2022
Int. Cl. G06F 9/30 (2018.01); G06F 21/72 (2013.01)
CPC G06F 9/30043 (2013.01) [G06F 21/72 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A processor comprising:
a memory hierarchy storing encrypted data;
tracking circuitry to track an execution context for instructions executed by the processor; and
cryptographic computing circuitry to:
obtain context information from the tracking circuitry for load instructions to be executed by the processor, the load instructions to load encrypted data from the memory hierarchy, the context information indicating information about branch predictions made by a branch prediction unit of the processor; and
decrypt the encrypted data using a key, wherein the context information indicating information about the branch predictions made by the branch prediction unit of the processor is used as a tweak input to the decryption.