US 12,478,264 B2
System for sensing arterial pulse waveform
Yu-Pin Hsu, Santa Clara, CA (US); Zemin Liu, Santa Clara, CA (US); and Mona Mostafa Hella, Watervliet, NY (US)
Assigned to Rensselaer Polytechnic Institute, Troy, NY (US)
Appl. No. 17/622,280
Filed by RENSSELAER POLYTECHNIC INSTITUTE, Troy, NY (US)
PCT Filed Jun. 26, 2020, PCT No. PCT/US2020/039880
§ 371(c)(1), (2) Date Dec. 23, 2021,
PCT Pub. No. WO2021/034408, PCT Pub. Date Feb. 25, 2021.
Claims priority of provisional application 62/934,496, filed on Nov. 12, 2019.
Claims priority of provisional application 62/867,614, filed on Jun. 27, 2019.
Prior Publication US 2022/0257126 A1, Aug. 18, 2022
Int. Cl. A61B 5/021 (2006.01); A61B 5/00 (2006.01); H03M 1/10 (2006.01); H03M 1/46 (2006.01)
CPC A61B 5/02108 (2013.01) [A61B 5/6802 (2013.01); A61B 5/7225 (2013.01); H03M 1/1023 (2013.01); H03M 1/466 (2013.01); A61B 2560/0252 (2013.01); A61B 2560/0257 (2013.01); A61B 2560/0261 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An offset calibration circuitry configured to compensate an offset voltage of a resistive bridge sensor of an arterial pulse waveform sensing system, the sensing system comprising a control system module coupled to a sensing module, the sensing module being wearable on the neck or wrist of a subject, wherein the control system module is configured to transmit control signals to the sensing module and the sensing module is configured to transmit pulse waveform data from the sensing module to the system control module, the sensing module comprising the resistive bridge pressure sensor and front end circuitry, the front end circuitry comprising the offset calibration circuitry which comprises:
a first current digital to analog converter (IDAC) coupled to a first successive approximation register (SAR) and configured to couple to a negative voltage port of a resistive bridge sensor, the first SAR configured to store a first digital value;
a second IDAC coupled to a second SAR and configured to couple to a positive voltage port of the resistive bridge sensor, the second SAR configured to store a second digital value; and
an SAR controller circuitry configured to adjust each bit of the first SAR and each bit of the second SAR based, at least in part, on an output of a comparator, the comparator configured to compare a voltage on the negative voltage port or a voltage on the positive voltage port to a common mode voltage.