CPC H10B 51/30 (2023.02) [H01L 29/40111 (2019.08); H01L 29/42368 (2013.01); H01L 29/516 (2013.01); H01L 29/66666 (2013.01); H01L 29/6684 (2013.01); H01L 29/7827 (2013.01); H01L 29/78391 (2014.09)] | 12 Claims |
1. A ferroelectric random-access memory (FeRAM) cell comprising:
a vertical channel between a bottom source/drain region and a top source/drain region;
a gate oxide surrounding the vertical channel; and
a ferroelectric layer surrounding the gate oxide,
wherein the ferroelectric layer has two or more sections of different horizontal thicknesses between the bottom source/drain region and the top source/drain region, and wherein the ferroelectric layer comprises a bottom section, a middle section, and a top section of three different horizontal thicknesses, the three different horizontal thicknesses being arranged in a staircase shape.
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