US 12,150,307 B2
Semiconductor device and manufacturing method of the semiconductor device
In Ku Kang, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Nov. 15, 2022, as Appl. No. 17/987,627.
Application 17/987,627 is a continuation of application No. 17/027,390, filed on Sep. 21, 2020, granted, now 11,532,641.
Claims priority of application No. 10-2020-0050932 (KR), filed on Apr. 27, 2020.
Prior Publication US 2023/0074522 A1, Mar. 9, 2023
Int. Cl. H10B 51/20 (2023.01); G11C 15/04 (2006.01); H10B 43/00 (2023.01); H10B 51/00 (2023.01); H10B 51/10 (2023.01)
CPC H10B 51/20 (2023.02) [G11C 15/04 (2013.01); G11C 15/046 (2013.01); H10B 43/00 (2023.02); H10B 51/00 (2023.02); H10B 51/10 (2023.02)] 13 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a stack structure including a plurality of conductive patterns;
a channel layer penetrating the stack structure; and
a memory layer penetrating the stack structure, the memory layer surrounding the channel layer between the channel layer and the stack structure,
wherein air gaps are defined between the conductive patterns,
wherein the memory layer includes memory parts between the conductive patterns and the channel layer and dummy parts between the air gaps and the channel layer,
wherein the memory parts and the dummy parts have ferroelectricity, and
wherein a maximum residual polarization intensity of the memory parts is greater than that of the dummy parts.