| CPC H10B 43/27 (2023.02) [H10B 43/10 (2023.02); H10B 43/35 (2023.02)] | 20 Claims |

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1. A memory device, comprising:
an alternating stack of insulating layers and electrically conductive layers located over a substrate;
a memory opening vertically extending through the alternating stack; and
a memory opening fill structure located in the memory opening and comprising a vertical semiconductor channel and a memory film,
wherein the memory film comprises:
a tunneling dielectric layer in contact with the vertical semiconductor channel;
a first vertical stack of first dielectric oxide material portions located at levels of the insulating layers and comprising a dielectric oxide material of a first element selected from Al, Si, or transition metal element; and
a second vertical stack of second dielectric oxide material portions located at levels of the electrically conductive layers and comprising a mixed dielectric oxide material that is a dielectric oxide material of the first element and a second element that is selected from Al, Si, or transition metal element and different from the first element.
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