US 12,150,295 B2
Method for manufacturing a memory using a plurality of sacrificial pillars
Jingwen Lu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Feb. 7, 2022, as Appl. No. 17/665,744.
Application 17/665,744 is a continuation of application No. PCT/CN2021/109895, filed on Jul. 30, 2021.
Claims priority of application No. 202110004478.1 (CN), filed on Jan. 4, 2021.
Prior Publication US 2022/0216216 A1, Jul. 7, 2022
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/482 (2023.02) 17 Claims
OG exemplary drawing
 
1. A manufacturing method of a memory, comprising:
providing a substrate, a plurality of bit line isolation walls being parallel arranged on the substrate;
forming a plurality of sacrificial pillars arranged at intervals between each two adjacent ones of the bit line isolation walls;
forming a supplementary layer on surfaces of the sacrificial pillars, the supplementary layer at least covering facing side surfaces of the sacrificial pillars;
performing ion implantation to the supplementary layer, an ion concentration of the supplementary layer decreasing from a top to a bottom of the supplementary layer;
etching the supplementary layer, a thickness of a remaining supplementary layer decreasing from a top to a bottom of the remaining supplementary layer;
forming a plurality of insulating pillars, each between each two adjacent ones of the sacrificial pillars, side surfaces of the insulating pillars being in contact with the bit line isolation walls and the remaining supplementary layer;
removing the sacrificial pillars and the remaining supplementary layer, the insulating pillars and the bit line isolation walls jointly define a plurality of contact holes; and
forming a plurality of node contact plugs in the contact holes.