US 12,149,745 B2
Encoder that generates a bitstream including a common header for one or more layers in a group of layers
Takahiro Nishi, Nara (JP); Tadamasa Toma, Osaka (JP); Kiyofumi Abe, Osaka (JP); and Yusuke Kato, Osaka (JP)
Assigned to PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA, Torrance, CA (US)
Filed by Panasonic Intellectual Property Corporation of America, Torrance, CA (US)
Filed on Jun. 7, 2022, as Appl. No. 17/834,194.
Application 17/834,194 is a continuation of application No. PCT/JP2020/046060, filed on Dec. 10, 2020.
Claims priority of provisional application 62/947,701, filed on Dec. 13, 2019.
Prior Publication US 2022/0303546 A1, Sep. 22, 2022
Int. Cl. H04N 19/70 (2014.01); H04N 19/105 (2014.01); H04N 19/154 (2014.01); H04N 19/169 (2014.01); H04N 19/172 (2014.01); H04N 19/29 (2014.01); H04N 19/30 (2014.01)
CPC H04N 19/70 (2014.11) [H04N 19/105 (2014.11); H04N 19/154 (2014.11); H04N 19/172 (2014.11); H04N 19/188 (2014.11); H04N 19/29 (2014.11); H04N 19/30 (2014.11)] 4 Claims
OG exemplary drawing
 
1. An encoder comprising:
circuitry; and
memory coupled to the circuitry, wherein
in operation,
for a group of layers including at least one output layer, the circuitry generates a bitstream including a common header for one or more layers in the group of layers, wherein when a total number of layers in the group of layers is 1, (i) performance requirement information indicating a performance requirement for a decoder is signaled in the common header, (ii) a flag indicating whether a hypothetical reference decoder (HRD) parameter is signaled or not is included in the common header, and (iii) in response to the flag indicating that the HRD parameter is signaled, the HRD parameter is not signaled in the common header, and
the bitstream includes the common header and encoded data of at least one image in the at least one output layer.