US 12,149,641 B2
Circuit apparatus and methods for PUF source and generating random digital sequence
Wai-Chi Fang, Hsinchu (TW); Nicolas Jean Roger Fahier, Hsinchu (TW); Hao-Ting Lin, Hsinchu (TW); and Yu-Jun Yang, Hsinchu (TW)
Assigned to INTELLIGENT INFORMATION SECURITY TECHNOLOGY INC., Hsinchu (TW)
Filed by INTELLIGENT INFORMATION SECURITY TECHNOLOGY INC., Hsinchu (TW)
Filed on Nov. 4, 2021, as Appl. No. 17/518,765.
Prior Publication US 2023/0139712 A1, May 4, 2023
Int. Cl. H04L 9/32 (2006.01); G06F 7/58 (2006.01); H03K 19/17768 (2020.01)
CPC H04L 9/3278 (2013.01) [G06F 7/588 (2013.01); H03K 19/17768 (2013.01)] 22 Claims
OG exemplary drawing
 
1. An electronic system to create a digital PUF source input exhibiting both static and dynamic mathematical entropy to feed both at once a physically unclonable function (PUF) system and a true random number generator system, comprising:
a control circuit comprising digital logic gates to interconnect sequentially and in parallel different blocks constituting the electronic system and to interface the electronic system with external electronics devices or systems;
an array of PUF cell units that are designed to be symmetrically balanced designed butterfly set reset latches (RS-latches) using standard gates, configured in a combinatorial loop mode for ensuring metastability, the array of PUF cell units comprising:
a number of rows and columns, each row connecting together common set/reset input of each PUF cell unit member of this row where each PUF cell unit has equal probability after manufacturing to output a logic high or low upon a trigger signal;
a row multiplexer circuit, one per PUF cells array column, acting as a row selection mechanism, that through a trigger mechanism selects a current triggered row from the array of PUF cell unit and forward output logic levels of each PUF cell unit targets to D-Flip Flop gates circuits;
a D-Flip Flop circuit, one per column from the array of PUF cell units, that collects each PUF cell unit result from a single row;
a states counter circuit for recording and counting each PUF cell unit result after each triggered metastable output, where the states counting results are collected row by row;
a collector circuit for recording and accumulating an entire statistical result of the array of PUF cell units and providing final statistical PUF source input that is used as an input entropy source of a random number generator and a physically unclonable function engine in order to extract both a fixed digital fingerprint sequence and random numbers upon the control circuit requests independently from current usage or power cycle of the electronics system; and
the random number generator for using detected metastable PUF cells unit results and using a certain amount of corresponding LSBs results to create true random bits forming true random numbers.