US 12,149,389 B2
Isolator with forward and return paths
Tetsuo Sato, San Jose, CA (US); Jiang Chen, Cupertino, CA (US); and Qiu Sha, San Jose, CA (US)
Assigned to Renesas Electronics America Inc., Milpitas, CA (US)
Filed by Renesas Electronics America Inc., Milpitas, CA (US)
Filed on Jan. 18, 2023, as Appl. No. 18/155,999.
Prior Publication US 2024/0243954 A1, Jul. 18, 2024
Int. Cl. H04L 27/06 (2006.01); H01L 23/66 (2006.01); H04L 25/02 (2006.01)
CPC H04L 27/06 (2013.01) [H01L 23/66 (2013.01); H04L 25/0266 (2013.01); H01L 2223/6611 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first chip;
a second chip;
an isolation barrier;
the first chip being configured to:
receive a first signal from a first device connected to the first chip, wherein the first signal is designated for a second device;
modulate a carrier signal, using the first signal, to generate a first modulated signal; and
transmit the carrier signal and the first modulated signal to the second chip through the isolation barrier; and
the second chip being configured to:
receive the carrier signal and the first modulated signal, wherein the carrier signal is received as a delayed carrier signal;
demodulate the first modulated signal to recover the first signal;
modulate the delayed carrier signal, using a second signal designated for the first device, to generate a second modulated signal; and
transmit the delayed carrier signal and the second modulated signal to the first chip through the isolation barrier.