US 12,149,237 B2
Semiconductor device and electronic device
Takayuki Ikeda, Kanagawa (JP); and Shuhei Nagatsuka, Kanagawa (JP)
Assigned to SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Kanagawa-ken (JP)
Appl. No. 18/016,888
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
PCT Filed Jul. 19, 2021, PCT No. PCT/IB2021/056484
§ 371(c)(1), (2) Date Jan. 19, 2023,
PCT Pub. No. WO2022/029532, PCT Pub. Date Feb. 10, 2022.
Claims priority of application No. 2020-131616 (JP), filed on Aug. 3, 2020.
Prior Publication US 2023/0283276 A1, Sep. 7, 2023
Int. Cl. H03K 17/687 (2006.01); G06F 7/544 (2006.01); H01L 29/786 (2006.01); G06G 7/16 (2006.01)
CPC H03K 17/687 (2013.01) [G06F 7/5443 (2013.01); H01L 29/7869 (2013.01); G06F 2207/4824 (2013.01); G06G 7/16 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, and a first capacitor,
wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor comprises a metal oxide in a channel formation region,
wherein a first terminal of the first transistor is electrically connected to a first terminal of the second transistor,
wherein a gate of the second transistor is electrically connected to a first terminal of the third transistor and a first terminal of the first capacitor,
wherein a second terminal of the second transistor is electrically connected to a second terminal of the first capacitor, a first terminal of the fourth transistor, a gate of the fifth transistor, a first terminal of the seventh transistor, and a gate of the eighth transistor,
wherein a first terminal of the fifth transistor is electrically connected to a first terminal of the sixth transistor and a gate of the seventh transistor,
wherein a first terminal of the eighth transistor is electrically connected to a first terminal of the ninth transistor and a gate of the tenth transistor, and
wherein a drain current of each of the second transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor is a subthreshold current.