US 12,149,212 B2
Amplifier circuitry and voltage correction circuitry
Tong Wang, Kawasaki Kanagawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed on Jun. 27, 2023, as Appl. No. 18/215,139.
Application 18/215,139 is a division of application No. 17/012,631, filed on Sep. 4, 2020, granted, now 11,817,828.
Claims priority of application No. 2020-023352 (JP), filed on Feb. 14, 2020.
Prior Publication US 2023/0353102 A1, Nov. 2, 2023
Int. Cl. H03F 1/56 (2006.01); H03F 3/19 (2006.01); H03K 5/24 (2006.01)
CPC H03F 1/56 (2013.01) [H03F 3/19 (2013.01); H03K 5/24 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01)] 3 Claims
OG exemplary drawing
 
1. An amplifier circuitry comprising:
a first bias voltage application circuitry configured to apply a first bias voltage to a first signal;
a first amplifier circuitry coupled to the first bias voltage application circuitry, and configured to amplify the first signal to which the first bias voltage is applied;
a second bias voltage application circuitry configured to apply a second bias voltage to a second signal which forms differential signals together with the first signal;
a second amplifier circuitry coupled to the second bias voltage application circuitry, and configured to amplify the second signal to which the second bias voltage is applied;
a voltage generation circuitry coupled to the first bias voltage application circuitry and to the second bias voltage application circuitry, and configured to generate the first bias voltage to be applied to the first signal and generate the second bias voltage to be applied to the second signal;
a combiner circuitry coupled between an output of the first amplifier circuitry and an output of the second amplifier circuitry, and configured to combine the differential signals;
a comparator circuitry coupled to a midpoint of the combiner circuitry, and configured to compare a reference voltage and a voltage at the midpoint of the combiner circuitry; and
a control circuitry coupled to the comparator circuitry and to the voltage generation circuitry, and configured to control, based on an output result of the comparator circuitry, the first bias voltage and the second bias voltage which are output from the voltage generation circuitry.