US 12,148,841 B2
Thin film transistor array substrate and display device
Chanyong Jeong, Paju-si (KR); Juheyuck Baeck, Seoul (KR); Dohyung Lee, Paju-si (KR); and Younghyun Ko, Paju-si (KR)
Assigned to LG Display Co., Ltd., Seoul (KR)
Filed by LG Display Co., Ltd., Seoul (KR)
Filed on Jun. 7, 2021, as Appl. No. 17/340,937.
Claims priority of application No. 10-2020-0076064 (KR), filed on Jun. 22, 2020.
Prior Publication US 2021/0399142 A1, Dec. 23, 2021
Int. Cl. H01L 29/786 (2006.01)
CPC H01L 29/78696 (2013.01) [H01L 29/78618 (2013.01); H01L 29/78633 (2013.01)] 24 Claims
OG exemplary drawing
 
1. A thin film transistor array substrate comprising:
a semiconductor layer including a channel portion, a first conductorization portion located at a first side of the channel portion, and a second conductorization portion located at a second side of the channel portion that is opposite the first side, wherein the first conductorization portion includes a first main conductorization portion and a first sub-conductorization portion, and the second conductorization portion includes a second main conductorization portion and a second sub-conductorization portion;
a gate insulator layer on the semiconductor layer and including a first contact hole and a second contact hole, the first contact hole exposing a portion of the first main conductorization portion and the second contact hole exposing a portion of the second main conductorization portion;
a main source electrode on the gate insulator layer, the main source electrode electrically connected to the first main conductorization portion through the first contact hole;
a main drain electrode on the gate insulator layer, the main drain electrode electrically connected to the second main conductorization portion through the second contact hole;
a main gate electrode on the gate insulator layer, the main gate electrode overlapping the channel portion; and
a functional insulating layer on the main source electrode, the main gate electrode, and the main drain electrode,
wherein the first sub-conductorization portion is located between the first main conductorization portion and the channel portion, the first sub-conductorization portion non-overlapping with the main source electrode and the main gate electrode and having an electrical conductivity different from an electrical conductivity of the first main conductorization portion,
wherein the second sub-conductorization portion is located between the second main conductorization portion and the channel portion, the second sub-conductorization portion non-overlapping with the main drain electrode and the main gate electrode and having an electrical conductivity different from an electrical conductivity of the second main conductorization portion, and
wherein the gate insulator layer is between the first sub-conductorization portion and the functional insulating layer, and is between the second sub-conductorization portion and the functional insulating layer,
wherein a hydrogen concentration of the functional insulating layer is greater than a hydrogen concentration of the first sub-conductorization portion and a hydrogen concentration of the second sub-conductorization portion.