US 12,148,833 B2
Three-dimensional, monolithically stacked field effect transistors formed on the front and backside of a wafer
Sung Dae Suk, Watervliet, NY (US); Somnath Ghosh, Clifton Park, NY (US); Chen Zhang, Guilderland, NY (US); Junli Wang, Slingerlands, NY (US); Devendra K. Sadana, Pleasantville, NY (US); and Dechao Guo, Niskayuna, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Sep. 25, 2023, as Appl. No. 18/473,482.
Application 18/473,482 is a division of application No. 17/481,647, filed on Sep. 22, 2021, granted, now 11,817,501.
Prior Publication US 2024/0014322 A1, Jan. 11, 2024
Int. Cl. H01L 29/78 (2006.01); H01L 25/07 (2006.01); H01L 29/08 (2006.01)
CPC H01L 29/785 (2013.01) [H01L 25/074 (2013.01); H01L 29/0847 (2013.01); H01L 29/7827 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an internal semiconductor layer comprising a first side and a second side opposite the first side;
a first field effect transistor (FET) disposed on the first side of the internal semiconductor layer; and
a second FET oriented opposite the first FET and disposed on the second side of the internal semiconductor layer in alignment with the first FET,
wherein at least one of:
the first FET comprises an extended contact that extends through the first side and to and through the second side of the internal semiconductor layer with straight sides that are each straight along an entire length of the extended contact, and
the second FET comprises an extended contact that extends through the second side and to and through the first side of the internal semiconductor layer with straight sides that are each straight along an entire length of the extended contact.