US 12,148,824 B2
MOSFET device with shielding region and manufacturing method thereof
Mario Giuseppe Saggio, Aci Bonaccorsi (IT); and Edoardo Zanetti, Valverde (IT)
Assigned to STMicroelectronics S.r.l., Agrate Brianza (IT)
Filed by STMicroelectronics S.r.l., Agrate Brianza (IT)
Filed on Feb. 4, 2022, as Appl. No. 17/665,398.
Application 17/665,398 is a division of application No. 16/528,410, filed on Jul. 31, 2019, granted, now 11,251,296.
Claims priority of application No. 102018000007780 (IT), filed on Aug. 2, 2018.
Prior Publication US 2022/0157989 A1, May 19, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 21/70 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7813 (2013.01) [H01L 21/70 (2013.01); H01L 29/063 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/4236 (2013.01); H01L 29/66734 (2013.01); H01L 29/0619 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a structural body of a first type of conductivity;
forming, at a first side of the structural body, a body region of a second type of conductivity opposite to the first type;
forming, at the first side of the structural body, a source region, of the first type of conductivity;
forming a first trench and a second trench in the structural body that both extend from the first side and entirely through the source region and the body region;
forming a first shielding region at a first end of the first trench in the structural body and a second shielding region at a second end of the second trench in the structural body, the first and second shielding regions both of the second type of conductivity, the first and second shielding regions extending towards a second side of the structural body;
forming a gate dielectric layer on sides and a bottom of the first trench and on sides and a bottom of the second trench, sides of the first trench being spaced from sides of the second trench by a portion of the structural body; and
forming a first gate electrode on the gate dielectric layer in the first trench and a second gate electrode on the gate dielectric layer in the second trench, the first gate electrode completely filling the first trench and the second gate electrode completely filling the second trench.