US 12,148,814 B2
Semiconductor device
Georgios Vellianitis, Heverlee (BE)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed on Jul. 25, 2023, as Appl. No. 18/358,691.
Application 18/358,691 is a division of application No. 17/716,425, filed on Apr. 8, 2022, granted, now 11,764,290.
Application 17/716,425 is a division of application No. 16/886,606, filed on May 28, 2020, granted, now 11,302,801, issued on Apr. 12, 2022.
Application 16/886,606 is a division of application No. 15/988,496, filed on May 24, 2018, granted, now 10,672,889, issued on Jun. 2, 2020.
Claims priority of provisional application 62/593,171, filed on Nov. 30, 2017.
Prior Publication US 2023/0369467 A1, Nov. 16, 2023
Int. Cl. H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/308 (2006.01); H01L 21/762 (2006.01); H01L 21/8238 (2006.01); H01L 21/8258 (2006.01); H01L 27/092 (2006.01)
CPC H01L 29/66795 (2013.01) [H01L 21/02609 (2013.01); H01L 21/02639 (2013.01); H01L 21/3083 (2013.01); H01L 21/76224 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 21/8258 (2013.01); H01L 27/0924 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
first and second semiconductor fins, wherein a longitudinal direction of the first semiconductor fin and a longitudinal direction of the second semiconductor fin are aligned with each other along a first direction;
third and fourth semiconductor fins, wherein a longitudinal direction of the third semiconductor fin and a longitudinal direction of the fourth semiconductor fin are aligned with each other along the first direction in a top view, wherein the third and fourth semiconductor fins have a conductivity type different from that of the first and second semiconductor fins;
a first gate structure extending across the first and third semiconductor fins along a second direction; and
a second gate structure extending across the second and fourth semiconductor fins along the second direction, wherein an end sidewall of the first fin and an end sidewall of the fourth semiconductor fin are substantially aligned with each other along a third direction crossing the first and second directions, and the third direction is parallel with a <100> crystallographic direction.