US 12,148,811 B2
Method of fabricating a semiconductor device having capacitor material
Wang-Chun Huang, Hsinchu (TW); Ching-Wei Tsai, Hsinchu (TW); Kuan-Lun Cheng, Hsin-Chu (TW); and Chih-Hao Wang, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Jul. 5, 2022, as Appl. No. 17/810,684.
Application 17/810,684 is a division of application No. 16/802,396, filed on Feb. 26, 2020, granted, now 11,715,781.
Prior Publication US 2022/0336622 A1, Oct. 20, 2022
Int. Cl. H01L 29/51 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/513 (2013.01) [H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/785 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
8. A method, comprising:
providing first and second structures over a substrate, wherein each of the first and the second structures includes source and drain regions, a channel region between the source and drain regions, a sacrificial dielectric layer over the channel region, and a sacrificial gate over the sacrificial dielectric layer;
partially recessing the sacrificial gate without exposing the sacrificial dielectric layer in each of the first and the second structures;
forming a first patterned mask over the sacrificial gate of the first structure and exposes the sacrificial gate of the second structure;
removing the sacrificial gate from the second structure while the sacrificial gate of the first structure is covered by at least a portion of the first patterned mask; and
removing the first patterned mask and the sacrificial dielectric layer from the second structure simultaneously.