US 12,148,809 B2
Layout pattern of static random access memory
Chun-Hsien Huang, Tainan (TW); Yu-Tse Kuo, Tainan (TW); Shu-Ru Wang, Taichung (TW); Chien-Hung Chen, Taipei (TW); Li-Ping Huang, Miaoli County (TW); and Chun-Yen Tseng, Tainan (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Jan. 25, 2022, as Appl. No. 17/583,225.
Claims priority of application No. 202111588319.7 (CN), filed on Dec. 23, 2021.
Prior Publication US 2023/0207648 A1, Jun. 29, 2023
Int. Cl. H01L 29/423 (2006.01); G11C 5/06 (2006.01); G11C 11/412 (2006.01); H01L 29/78 (2006.01); H10B 10/00 (2023.01)
CPC H01L 29/42376 (2013.01) [G11C 5/063 (2013.01); G11C 11/412 (2013.01); H01L 29/7851 (2013.01); H10B 10/12 (2023.02)] 11 Claims
OG exemplary drawing
 
1. A layout pattern of a static random access memory (SRAM), comprising:
a plurality of fin structures located on a substrate;
a plurality of gate structures located on the substrate, wherein the plurality of gate structures span the plurality of fin structures, to form a PU1 (first pull-up transistor), a PU2 (second pull-up transistor), a PD1A (first pull-down transistor), a PD1B (second pull-down transistor), a PD2A (third pull-down transistor), a PD2B (fourth pull-down transistor), a PG1A (first access transistor), a PG1B (second access transistor), a PG2A (third access transistor) and a PG2B (fourth access transistor) on the substrate, wherein the PD1A and the PD1B are connected in parallel, and the PD2A and the PD2B are connected in parallel;
wherein the plurality of gate structures include a first J-shaped gate structure, the first J-shaped gate structure spans a part of the fin structures and forms the PU1, the PD1A and the PD1B, the first J-shaped gate structure comprises a long side structure, a short side structure and a connection structure, and the first J-shaped gate structure is an integrally formed structure; and
a third gate structure disposed beside the long side structure of the first J-shaped gate structure, and the third gate structure spans a part of the fin structures and constitutes the PG1B, wherein the connection structure of the first J-shaped gate structure is disposed between the third gate structure and the short side structure of the first J-shaped gate structure.