US 12,148,801 B2
Nitride-based semiconductor device and method for manufacturing the same
Chuan He, Suzhou (CN); Xiaoqing Pu, Suzhou (CN); Ronghui Hao, Suzhou (CN); and King Yuen Wong, Suzhou (CN)
Assigned to INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD., Suzhou (CN)
Appl. No. 17/617,935
Filed by INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD., Suzhou (CN)
PCT Filed Nov. 9, 2021, PCT No. PCT/CN2021/129622
§ 371(c)(1), (2) Date Dec. 10, 2021,
PCT Pub. No. WO2023/082058, PCT Pub. Date May 19, 2023.
Prior Publication US 2024/0162298 A1, May 16, 2024
Int. Cl. H01L 29/20 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01)
CPC H01L 29/2003 (2013.01) [H01L 29/66462 (2013.01); H01L 29/7787 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A nitride-based semiconductor device, comprising:
a first nitride-based semiconductor layer having at least one trench;
a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and spaced apart from the trench, wherein the second nitride-based semiconductor layer has a bandgap higher than a bandgap of the first nitride-based semiconductor layer;
a source electrode and a drain electrode disposed above the second nitride-based semiconductor layer;
a gate electrode disposed above the second nitride-based semiconductor layer and between the source and drain electrodes, so as to at least define a drift region between the gate electrode and the drain electrode and overlapping with the trench;
a third nitride-based semiconductor layer at least disposed in the trench and extending upward from the trench to make contact with the second nitride-based semiconductor layer, wherein the third nitride-based semiconductor layer has a bandgap higher than the bandgap of the first nitride-based semiconductor layer; and
a dielectric layer disposed above the second nitride-based semiconductor layer and covers the gate electrode, wherein the third nitride-based semiconductor layer further extends upward to a position higher than the dielectric layer.