US 12,148,799 B2
Semiconductor device, method for manufacturing semiconductor device, inverter circuit, drive device, vehicle, and elevator
Tatsuo Shimizu, Shinagawa (JP); Yukio Nakabayashi, Yokohama (JP); Johji Nishio, Machida (JP); Chiharu Ota, Kawasaki (JP); and Toshihide Ito, Shibuya (JP)
Assigned to KABUSHIKI KAISHA TOSHIBA, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP)
Filed on Aug. 1, 2023, as Appl. No. 18/363,214.
Application 18/363,214 is a division of application No. 16/992,220, filed on Aug. 13, 2020, granted, now 11,764,270.
Claims priority of application No. 2020-049316 (JP), filed on Mar. 19, 2020.
Prior Publication US 2023/0387216 A1, Nov. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/16 (2006.01); C23C 16/453 (2006.01); H01L 29/20 (2006.01); H01L 29/51 (2006.01)
CPC H01L 29/1608 (2013.01) [C23C 16/453 (2013.01); H01L 29/2003 (2013.01); H01L 29/517 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a silicon carbide layer;
a silicon oxide layer; and
a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm−3, wherein
nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region,
a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm−3, and
a carbon concentration at the position is equal to or less than 1×1018 cm−3.