US 12,148,791 B2
Semiconductor structures having deep trench capacitor and methods for manufacturing the same
Szu-Yu Hou, New Taipei (TW); and Li-Han Lin, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Jul. 7, 2023, as Appl. No. 18/219,247.
Application 18/219,247 is a division of application No. 17/888,749, filed on Aug. 16, 2022.
Prior Publication US 2024/0063255 A1, Feb. 22, 2024
Int. Cl. H10B 12/00 (2023.01); H01L 49/02 (2006.01)
CPC H01L 28/75 (2013.01) [H01L 28/91 (2013.01); H01L 28/92 (2013.01); H10B 12/01 (2023.02); H10B 12/033 (2023.02); H10B 12/0387 (2023.02); H10B 12/31 (2023.02)] 7 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
a multilayered stack disposed on the substrate, including:
a first nitride layer disposed on the substrate;
a first silicon-containing layer disposed on the first nitride layer;
an intermediate nitride layer disposed on the first silicon-containing layer;
a second silicon-containing layer disposed on the intermediate nitride layer; and
a second nitride layer disposed on the second silicon-containing layer; and
a trench capacitor penetrating the multilayered stack and in contact with the substrate, wherein the trench capacitor has a first portion and a second portion above the first portion, wherein the first portion have a uniform width, wherein the second portion have a first width adjacent to the intermediate nitride layer and a second width adjacent to the second nitride layer, and wherein the second width greater than the first width;
wherein the first silicon-containing layer includes a first region adjacent to the first nitride layer and a second region on the first region, wherein the first region of the first silicon-containing layer has a first doping concentration, and the second region of the first silicon-containing layer has a second doping concentration different from the first doping concentration.