US 12,148,784 B2
Image sensor
Dae Shik Kim, Hwaseong-si (KR); Min-Sun Keel, Seoul (KR); Hoon Joo Na, Seoul (KR); Kang Ho Lee, Seongnam-si (KR); Kil Ho Lee, Hwaseong-si (KR); Sang Kil Lee, Seongnam-si (KR); Jung Hyuk Lee, Hwaseong-si (KR); and Shin Hee Han, Seongnam-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Aug. 4, 2021, as Appl. No. 17/393,855.
Claims priority of application No. 10-2020-0141089 (KR), filed on Oct. 28, 2020.
Prior Publication US 2022/0130884 A1, Apr. 28, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 27/146 (2006.01)
CPC H01L 27/14636 (2013.01) [H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14629 (2013.01); H01L 27/14634 (2013.01); H01L 27/14643 (2013.01)] 16 Claims
OG exemplary drawing
 
1. An image sensor comprising:
first and second chips; and
a contact plug connecting the first and second chips,
wherein,
the first chip includes a first semiconductor substrate including first and second surfaces that are opposite to each other, a photoelectric conversion layer in the first semiconductor substrate, a color filter on the first surface of the first semiconductor substrate, a microlens covering the color filter, a first transistor on the second surface of the first semiconductor substrate and adjacent to the photoelectric conversion layer, a first insulating layer on the second surface of the first semiconductor substrate, and a first connecting structure in the first insulating layer and connected to the first transistor,
the second chip includes a second insulating layer including a third surface contacting the first insulating layer and a fourth surface opposite to the third surface, a second semiconductor substrate on the fourth surface of the second insulating layer, a second transistor on the second semiconductor substrate, a second connecting structure in the second insulating layer and connected to the second transistor, the second connecting structure including first and second metal layers, the second chip further including a first contact connected to the first metal layer in the second insulating layer between the first and second metal layers, and a first variable resistance element on the first contact in the second insulating layer and between the first and second metal layers, and is connected to the second metal layer,
the contact plug extends from the first surface of the first semiconductor substrate to connect the first and second connecting structures,
a vertical thickness of the second metal layer is greater than a vertical thickness of the first metal layer, and
the image sensor further includes a second contact connecting the second metal layer and a third metal layer, wherein the third metal layer has a vertical thickness greater than that of the first metal layer.
 
9. An image sensor comprising:
first and second chips; and
a contact plug connecting the first and second chips,
wherein,
the first chip includes a first semiconductor substrate including first and second surfaces that are opposite to each other, a photoelectric conversion layer in the first semiconductor substrate, a color filter on the first surface of the first semiconductor substrate, a microlens covering the color filter, a first transistor on the second surface of the first semiconductor substrate and adjacent to the photoelectric conversion layer, a first insulating layer on the second surface of the first semiconductor substrate, and a first connecting structure in the first insulating layer and connected to the first transistor,
the second chip includes a second insulating layer including a third surface contacting the first insulating layer and a fourth surface opposite to the third surface, a second semiconductor substrate on the fourth surface of the second insulating layer, a second transistor on the second semiconductor substrate, a second connecting structure in the second insulating layer and connected to the second transistor, the second connecting structure including first and second metal layers, the second chip further including a first contact connected to the first metal layer in the second insulating layer between the first and second metal layers, and a first variable resistance element on the first contact in the second insulating layer and between the first and second metal layers, and is connected to the second metal layer,
the contact plug extends from the first surface of the first semiconductor substrate to connect the first and second connecting structures, wherein
the second insulating layer includes a first sub-insulating layer between the first and second metal layers along the first metal layer and surrounding the first contact, and
the first sub-insulating layer is recessed.