US 12,148,723 B2
Structure of semiconductor device
Zhirui Sheng, Singapore (SG); Hui-Ling Chen, Kaohsiung (TW); Chung-Hsing Kuo, Taipei (TW); Chun-Ting Yeh, Taipei (TW); Ming-Tse Lin, Hsinchu (TW); and Chien En Hsu, Singapore (SG)
Assigned to United Microelectronics Corp., Hsinchu (TW)
Filed by United Microelectronics Corp., Hsinchu (TW)
Filed on Dec. 7, 2022, as Appl. No. 18/077,191.
Application 18/077,191 is a division of application No. 16/984,601, filed on Aug. 4, 2020, granted, now 11,557,558.
Claims priority of application No. 202010637115.7 (CN), filed on Jul. 3, 2020.
Prior Publication US 2023/0101900 A1, Mar. 30, 2023
Int. Cl. H01L 21/66 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 24/06 (2013.01) [H01L 22/32 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/0605 (2013.01); H01L 2224/0612 (2013.01); H01L 2224/0651 (2013.01); H01L 2224/8034 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A structure of semiconductor device, comprising:
a first circuit structure, formed on a first substrate;
a first test pad, disposed on the first substrate;
a second circuit structure, formed on a second substrate; and
a second test pad, disposed on the second substrate,
wherein a first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure, wherein one of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad,
wherein the inner pad includes at least one pad and the outer pad includes a closed ring pad.