US 12,148,705 B2
Methods for forming semiconductor devices bonded by interposer structure
Jun Liu, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Jun. 1, 2021, as Appl. No. 17/336,214.
Application 17/336,214 is a division of application No. 16/727,869, filed on Dec. 26, 2019, granted, now 11,605,593.
Application 16/727,869 is a continuation of application No. PCT/CN2019/110708, filed on Oct. 12, 2019.
Prior Publication US 2021/0296302 A1, Sep. 23, 2021
Int. Cl. H01L 23/538 (2006.01); H01L 23/498 (2006.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/41 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01)
CPC H01L 23/5383 (2013.01) [H01L 23/49811 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 23/5386 (2013.01); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for forming a three-dimensional (3D) memory device, comprising:
forming, in a first semiconductor structure, a plurality of logic process-compatible devices and a plurality of first bonding contacts conductively connected to the plurality of logic process-compatible devices;
forming, in a second semiconductor structure, an array of NAND memory cells and a plurality of second bonding contacts conductively connected to the array of NAND memory cells;
preparing an interposer structure on a carrier wafer;
after forming the second semiconductor structure, bonding a first surface of the interposer structure opposite to the carrier wafer to the second semiconductor structure, a plurality of first interposer contacts disposed at the first surface of the interposer structure being conductively connected to the plurality of second bonding contacts; and
after removing the carrier wafer from the bonded second semiconductor structure and the interposer structure, bonding a second surface of the interposer structure to the first semiconductor structure, a plurality of second interposer contacts disposed at the second surface of the interposer structure being conductively connected to the plurality of first bonding contacts, wherein the interposer structure is attached to the first semiconductor structure and the second semiconductor structure.