US 12,148,677 B2
Semiconductor device and method of forming ultra high density embedded semiconductor die package
See Chian Lim, Singapore (SG); Teck Tiong Tan, Singapore (SG); Yung Kuan Hsiao, Singapore (SG); Ching Meng Fang, Singapore (SG); Yoke Hor Phua, Singapore (SG); and Bartholomew Liao, Singapore (SG)
Assigned to JCET Semiconductor (Shaoxing) Co., Ltd., (CN)
Filed by JCET Semiconductor (Shaoxing) Co., Ltd., Shaoxing (CN)
Filed on Dec. 7, 2021, as Appl. No. 17/457,974.
Application 17/457,974 is a division of application No. 15/457,736, filed on Mar. 13, 2017, granted, now 11,227,809.
Application 15/457,736 is a division of application No. 14/187,014, filed on Feb. 21, 2014, granted, now 9,627,338, issued on Apr. 18, 2017.
Claims priority of provisional application 61/835,321, filed on Jun. 14, 2013.
Claims priority of provisional application 61/773,308, filed on Mar. 6, 2013.
Prior Publication US 2022/0093479 A1, Mar. 24, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/14 (2006.01); H01L 23/15 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01)
CPC H01L 23/3128 (2013.01) [H01L 21/56 (2013.01); H01L 21/768 (2013.01); H01L 23/145 (2013.01); H01L 23/15 (2013.01); H01L 23/295 (2013.01); H01L 23/3135 (2013.01); H01L 23/49822 (2013.01); H01L 23/5389 (2013.01); H01L 24/11 (2013.01); H01L 24/16 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 21/568 (2013.01); H01L 23/562 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/96 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/351 (2013.01); H01L 2924/3511 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of making a semiconductor device, comprising:
providing a first insulating film, wherein the first insulating film includes glass fibers, glass fillers, or glass cloth;
laminating a first conductive layer onto a first surface of the first insulating film, wherein the first conductive layer completely covers a surface of the first insulating film, and wherein the first conductive layer is a prefabricated copper foil;
disposing an insulating layer over the first insulating film opposite the first conductive layer;
disposing a semiconductor die over the insulating layer;
pressing the semiconductor die into the insulating layer; and
forming a build-up interconnect structure over the semiconductor die and insulating layer opposite the first conductive layer, wherein the build-up interconnect structure includes a solder bump, and wherein the first conductive layer remains completely covering the surface of the first insulating film after forming the build-up interconnect structure including the solder bump.