US 12,148,660 B2
Low resistance and high reliability metallization module
Roey Shaviv, Palo Alto, CA (US); Suketu Arun Parikh, San Jose, CA (US); Feng Chen, San Jose, CA (US); and Lu Chen, Cupertino, CA (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Sep. 28, 2021, as Appl. No. 17/487,123.
Claims priority of provisional application 63/087,969, filed on Oct. 6, 2020.
Prior Publication US 2022/0108917 A1, Apr. 7, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 21/02 (2006.01)
CPC H01L 21/76847 (2013.01) [H01L 21/02115 (2013.01); H01L 21/76814 (2013.01); H01L 21/76879 (2013.01); H01L 21/76883 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method of forming an electronic device, the method comprising:
pre-cleaning the electronic device;
selectively depositing a metal layer on a bottom portion of an opening in an insulating layer on a first metallization layer, the opening comprising a trench and a via, the insulating layer comprising the opening extending from a top surface of the insulating layer to the first metallization layer, the opening having at least one sidewall, a top portion, and the bottom portion that is the via, the bottom portion not comprising a bottom barrier layer, the metal layer extending to the first metallization layer, wherein the metal layer does not form in the top portion of the opening;
selectively depositing a barrier layer on the at least one sidewall of the top portion of the opening and not on the metal layer and not on the bottom portion that is the via of the opening; and
forming a second metallization layer in the top portion of the opening on the metal layer and on the barrier layer,
the method being performed in a cluster tool without breaking vacuum.