US 12,148,624 B2
Wet etch process and method to control fin height and channel area in a fin field effect transistor (FinFET)
Shan Hu, Albany, NY (US); Eric Chih-Fang Liu, Albany, NY (US); Henan Zhang, Albany, NY (US); Sangita Kumari, Albany, NY (US); and Peter Delia, Albany, NY (US)
Assigned to Tokyo Electron Limited, Tokyo (JP)
Filed by Tokyo Electron Limited, Tokyo (JP)
Filed on Sep. 12, 2022, as Appl. No. 17/942,387.
Prior Publication US 2024/0087909 A1, Mar. 14, 2024
Int. Cl. H01L 21/311 (2006.01)
CPC H01L 21/31111 (2013.01) 20 Claims
OG exemplary drawing
 
1. A method that uses wet etching to control fin height in a fin field effect transistor (FinFET) fabrication process, the method comprising:
providing a patterned substrate, the patterned substrate having: (a) a plurality of fins that extend vertically from a surface of the patterned substrate, and (b) an oxide material that is formed on the plurality of fins and within gaps provided between the plurality of fins, wherein a critical dimension (CD) of the gaps varies across the plurality of fins; and
etching the oxide material by exposing the patterned substrate to an etch solution, wherein said etching controls the fin height in the FinFET fabrication process by removing the oxide material from the gaps between the plurality of fins at different etch rates.
 
11. A method that uses wet etching to control channel area in a fin field effect transistor (FinFET) fabrication process, the method comprising:
providing a patterned substrate, the patterned substrate having: (a) a number (n) of fins of constant width (W) that extend vertically from a surface of the patterned substrate, and (b) an oxide material that is formed on the plurality of fins and within gaps provided between the plurality of fins, wherein a critical dimension (CD) of the gaps varies across the plurality of fins; and
etching the oxide material by exposing the patterned substrate to an etch solution, wherein said etching removes the oxide material from the gaps between the plurality of fins at different etch rates to adjust the height (H) of one or more of the plurality of fins and control the channel area (n*W*H) in the FinFET fabrication process.