CPC H01H 71/123 (2013.01) [H01L 29/747 (2013.01); H02H 1/0007 (2013.01); H02H 3/093 (2013.01)] | 21 Claims |
1. A solid-state circuit breaker (SSCB), comprising:
at least one solid-state switch configured to selectively enable and disable a current path through the SSCB based on at least one control signal;
a current sense circuit configured to sense a current through the current path and generate a first output representative of the current;
an analog fault detection circuit coupled with the first output and configured to assert a second output in response to the current through the current path exceeding a trip current level for the SSCB, wherein the analog fault detection circuit has a first di/dt detection bandwidth; and
a controller coupled with the second output and configured to:
(a) generate samples of the first output utilizing at least one analog-to-digital converter (ADC), wherein the at least one ADC has a second di/dt detection bandwidth that is less than the first di/dt detection bandwidth;
(b) calculate the current through the current path based on the samples;
(c) determine whether the calculated current through the current path exceeds the trip current level for the SSCB;
(d) disable the current path through the SSCB utilizing the at least one control signal in response to determining that the calculated current exceeds the trip current level for the SSCB;
(e) concurrently with (a), (b) and (c), determine whether the second output is asserted; and
(f) disable the current path through the SSCB utilizing the at least one control signal in response to determining that the second output is asserted.
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