US 12,148,503 B2
Integrated circuit comprising a non-volatile memory
Xavier Lecoq, Voiron (FR)
Assigned to STMICROELECTRONICS (GRAND OUEST) SAS, Le Mans (FR)
Filed by STMicroelectronics (Grenoble 2) SAS, Grenoble (FR)
Filed on Sep. 16, 2022, as Appl. No. 17/932,694.
Claims priority of application No. 2110247 (FR), filed on Sep. 29, 2021.
Prior Publication US 2023/0100872 A1, Mar. 30, 2023
Int. Cl. G11C 7/06 (2006.01); G11C 7/04 (2006.01); G11C 7/10 (2006.01)
CPC G11C 7/067 (2013.01) [G11C 7/04 (2013.01); G11C 7/1069 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a non-volatile memory comprising:
a plurality of memory cells,
wherein each memory cell is configured to store information, and
wherein each memory cell is configured to provide a reading current having an intensity dependent on a value stored in the memory cell when the memory cell is selected for reading; and
a sense amplifier comprising:
a first amplifier configured to amplify the reading current of each memory cell selected for reading;
an oscillation generator configured to generate on basis of an amplified signal a signal having oscillations according to a frequency dependent on the intensity of the current of the amplified signal;
a counter configured to count the oscillations of the signal generated by the oscillation generator over at least one given period of time; and
a digital processing circuit configured to determine a value represented by the amplified signal on basis of the value counted during the at least one given period of time and based on a lookup table between values countable by the counter and values representable by the amplified signal.