| CPC G11C 11/5642 (2013.01) [G06F 11/1012 (2013.01); G06F 11/1068 (2013.01); G11C 16/26 (2013.01); G11C 16/34 (2013.01); G11C 29/52 (2013.01); H03M 13/45 (2013.01); G11C 2029/0411 (2013.01)] | 18 Claims |

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1. An apparatus, comprising:
an array of memory cells; and
a controller configured to operate sense circuitry to perform a single sense operation on a memory cell of the array to determine a data state of the memory cell and soft data associated with the data state of the memory cell, wherein the single sense operation includes:
providing a single sensing signal to an access line of the array to which the memory cell is coupled;
modulating the single sensing signal, wherein modulating the single sensing signal includes stepping the single sensing signal down or stepping the single sensing signal up; and
determining the data state of the memory cell and the soft data associated with the data state of the memory cell while the single sensing signal is being stepped down or stepped up.
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