US 12,148,350 B2
Driving circuit, driving method, driving module and display device
Zhichong Wang, Beijing (CN)
Assigned to BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/772,052
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed May 25, 2021, PCT No. PCT/CN2021/095775
§ 371(c)(1), (2) Date Apr. 26, 2022,
PCT Pub. No. WO2022/246642, PCT Pub. Date Dec. 1, 2022.
Prior Publication US 2024/0144851 A1, May 2, 2024
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/2092 (2013.01) [G09G 2310/0267 (2013.01); G09G 2310/062 (2013.01); G09G 2310/08 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A driving circuit, comprising a light-emitting control signal generating circuit and a gate driving circuit; wherein the light-emitting control signal generating circuit includes a first node control circuit, a second node control circuit, a third node control circuit and a light-emitting control output circuit;
the first node control circuit is configured to control a potential of a first node;
the second node control circuit is configured to control a potential of a second node;
the third node control circuit is configured to control a potential of a third node;
the light-emitting control output circuit is configured to control a light-emitting control signal output terminal to output a light-emitting control signal according to the potential of the second node and the potential of the third node;
the gate driving circuit is configured to control a gate driving signal output terminal to output a gate driving signal according to a first clock signal provided by a first clock signal terminal and a first voltage signal provided by a first voltage terminal under the control of the potential of the first node, a first input signal provided by a first input terminal and a reset signal provided by a reset terminal;
wherein the gate driving circuit comprises a fourth node control circuit and a gate output circuit;
the fourth node control circuit is configured to control to connect or disconnect a fourth node and the reset terminal under the control of the potential of the first node, and control to connect or disconnect the fourth node and the first voltage terminal under the control of the first input signal provided by the first input terminal;
the gate output circuit is configured to control to connect or disconnect the gate driving signal output terminal and the first clock signal terminal under the control of potential of the fourth node, and control to connect or disconnect the gate driving signal output terminal and the first voltage terminal under the control of the first input signal, and to control the gate driving signal provided by the gate driving signal output terminal according to the potential of the fourth node.