US 12,148,348 B2
Data driving circuit, display device including the same, and method of driving the same
Won Tae Kim, Yongin-si (KR); Bo Yeon Kim, Yongin-si (KR); and Jae Han Lee, Yongin-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin -Si (KR)
Filed by Samsung Display Co., Ltd., Yongin-Si (KR)
Filed on Aug. 22, 2023, as Appl. No. 18/236,426.
Claims priority of application No. 10-2023-0021692 (KR), filed on Feb. 17, 2023.
Prior Publication US 2024/0282235 A1, Aug. 22, 2024
Int. Cl. G09G 3/20 (2006.01); G09G 3/3208 (2016.01)
CPC G09G 3/2074 (2013.01) [G09G 3/3208 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0823 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/0233 (2013.01); G09G 2354/00 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A data driving circuit comprising:
an amplifier having an offset voltage, and configured to output a data voltage reflecting the offset voltage;
an offset control circuit configured to control, in response to an input control signal, the amplifier to output the data voltage reflecting the offset voltage in a positive direction or a negative direction; and
a sensing circuit configured to receive an analog sensing voltage,
wherein the data voltage generated based on the input control signal of a first logic level is applied to a sub-pixel in an N-th frame (N is an integer of 1 or more),
wherein the data voltage generated based on the input control signal of a second logic level is applied to the sub-pixel in an N+1-th frame,
wherein the sensing circuit senses a first saturation voltage of a first transistor of the sub-pixel in the N-th frame,
wherein the sensing circuit senses a second saturation voltage of the first transistor in the N+1-th frame, and
wherein the data driving circuit outputs the sensed first saturation voltage and the sensed second saturation voltage to a timing controller to calculate the offset voltage of the amplifier.