| CPC G09G 3/20 (2013.01) [G09G 2310/0275 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01)] | 17 Claims |

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1. A display driving circuit comprising:
a controller configured to time-divisionally generate a first selection signal and a second selection signal corresponding to a plurality of voltage ranges;
a data switching circuit configured to receive the first selection signal and the second selection signal and provide an image signal;
the data switching circuit further configured to turn on a first switch during a first period in response to the first selection signal and a second switch during a second period in response to the second selection signal,
a data driver including a plurality of driving units and configured to generate the image signal on the basis of image data from the controller; and
a plurality of output pads for connecting to a plurality of pixel groups through a plurality of data lines,
wherein the first selection signal and the second selection signal are within a first voltage range, and
wherein the first switch and the second switch are connected to one of the driving units and to a first and second output pad of the plurality of output pads, respectively.
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