US 12,147,365 B2
Data processing method, apparatus and storage medium
Dong Wang, Jiangsu (CN); Wei He, Jiangsu (CN); and Bin Zhu, Jiangsu (CN)
Assigned to SUZHOU CENTEC COMMUNICATIONS CO., LTD., Jiangsu (CN)
Appl. No. 17/767,935
Filed by SUZHOU CENTEC COMMUNICATIONS CO., LTD., Jiangsu (CN)
PCT Filed Nov. 12, 2019, PCT No. PCT/CN2019/117692
§ 371(c)(1), (2) Date Apr. 11, 2022,
PCT Pub. No. WO2021/068335, PCT Pub. Date Apr. 15, 2021.
Claims priority of application No. 201910962889.4 (CN), filed on Oct. 11, 2019.
Prior Publication US 2024/0104042 A1, Mar. 28, 2024
Int. Cl. G06F 13/40 (2006.01)
CPC G06F 13/4004 (2013.01) 11 Claims
OG exemplary drawing
 
1. A data processing method, applied in a system comprising an Ethernet switching chip, an optical module and a Printed Circuit Board (PCB), wherein the optical module comprises multiple Physical Medium Dependence Lane (PMDL) physical link ports, the Ethernet switching chip comprises multiple Physical Coding Sublayer (PCS) channels and multiple Physical Medium Attachment Lanes (PMALs), each PCS channel comprising one or more Physical Coding Sublayer Lane (PCSL) links, each PMAL corresponding to one first data transmission channel, and the multiple PMALs and the multiple PDML physical link ports are connected with each other on the PCB, the data processing method comprising:
receiving first data comprising multiple pieces of second data, wherein each piece of second data carries a channel identifier of the PCS channel that sends the second data, and a link identifier of the PCSL link that sends the second data;
transmitting each piece of second data to a first data transmission channel whose configured channel identifier and link identifier respectively match the channel identifier and the link identifier carried by the piece of second data, wherein the channel identifier and the link identifier of the first data transmission channel are configured according to link cross information that indicates a cross connection relationship between the multiple PMALs and the multiple PDML physical link ports on the PCB, so that the channel identifier and the link identifier of the first data transmission channel are respectively consistent with the channel identifier of the PCS channel and the link identifier of the PCSL link with which the PMDL physical link port connected to the corresponding PMAL is expected to correspond; and
sending the piece of second data of the first data transmission channel to the corresponding PMAL, so that the corresponding PMAL sends the piece of second data to the connected PMDL physical link port.