US 12,147,262 B2
First-in first-out buffer with lookahead performance booster
Kok Yoong Foo, Butterworth (MY); and Sze Yin Lee, Georgetown (MY)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 24, 2020, as Appl. No. 17/133,928.
Claims priority of provisional application 63/081,134, filed on Sep. 21, 2020.
Prior Publication US 2021/0223815 A1, Jul. 22, 2021
Int. Cl. G06F 1/08 (2006.01); G06F 12/02 (2006.01)
CPC G06F 1/08 (2013.01) [G06F 12/023 (2013.01); G06F 2212/251 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A first-in first-out buffer (FIFO) comprising:
a memory that stores data in a plurality of memory entries of the memory using a first clock signal and outputs the stored data using a second clock signal in response to receiving a read enable signal; and
lookahead circuitry configured to:
determine a threshold number of memory entries less than the plurality of memory entries based on determining a difference between frequencies of the first clock signal and the second clock signal;
track a number of memory entries of the plurality of memory entries storing at least a portion of the data; and
generate the read enable signal based on the threshold number of memory entries storing the portion of the data.