US 12,147,136 B2
Array substrate, display device and driving circuit
Yunyang Liu, Shenzhen (CN); Jie Wang, Shenzhen (CN); Yuchun Xu, Shenzhen (CN); Li Lv, Shenzhen (CN); Guangchen Zhang, Shenzhen (CN); Zhiwei Li, Shenzhen (CN); and Baohong Kang, Shenzhen (CN)
Assigned to HKC CORPORATION LIMITED, Shenzhen (CN)
Filed by HKC CORPORATION LIMITED, Shenzhen (CN)
Filed on Dec. 21, 2022, as Appl. No. 18/086,629.
Claims priority of application No. 202210905349.4 (CN), filed on Jul. 29, 2022.
Prior Publication US 2024/0045290 A1, Feb. 8, 2024
Int. Cl. G02F 1/1362 (2006.01); G09G 3/36 (2006.01)
CPC G02F 1/136286 (2013.01) [G02F 1/136222 (2021.01); G09G 3/3614 (2013.01)] 10 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a substrate;
a pixel electrode layer, disposed on the substrate;
a first insulating layer, disposed on the substrate and covering the pixel electrode layer;
a plurality of data lines, disposed on the first insulating layer; and
a second insulating layer, disposed on the first insulating layer and covering the plurality of data lines;
a common electrode layer, disposed on the second insulating layer, the common electrode layer comprising a plurality of common shield electrode layers; and
a plurality of data signal cancellation lines, disposed between the common electrode layer and the first insulating layer, wherein the plurality of data signal cancellation lines are disposed in one-to-one correspondence with the plurality of data lines;
wherein a voltage signal of each of the plurality of data signal cancellation lines has an opposite polarity to a voltage signal of the respective data line; wherein each of the plurality of data signal cancellation lines is disposed along an extending direction of the respective data line; wherein in a direction from the pixel electrode layer toward the common electrode layer, each of the plurality of common shield electrode layers covers one respective data signal cancellation line and one respective data line; wherein a gap is defined between a projection of each data line along a direction perpendicular to the substrate and a projection of the respective data signal cancellation line along the direction perpendicular to the substrate, and wherein a width of the gap is greater than or equal to a preset distance;
wherein the plurality of data signal cancellation lines are disposed on the first insulating layer, and are disposed in a same layer as the plurality of data lines; wherein a width of the gap formed between each data signal cancellation line and the respective data line is greater than the preset distance, the preset distance being greater than zero and being less than or equal to a difference between a width of the common electrode layer and a total width of the respective data signal cancellation line and respective data line.