US 12,146,908 B1
In-situ testing system for semiconductor device in aerospace irradiation environment
Feng Zhou, Nanjing (CN); Wenfeng Wang, Nanjing (CN); Hai Lu, Nanjing (CN); Weizong Xu, Nanjing (CN); Dong Zhou, Nanjing (CN); and Fangfang Ren, Nanjing (CN)
Assigned to NANJING UNIVERSITY, Nanjing (CN)
Filed by NANJING UNIVERSITY, Nanjing (CN)
Filed on Apr. 10, 2024, as Appl. No. 18/631,171.
Claims priority of application No. 202311370126.3 (CN), filed on Oct. 23, 2023.
Int. Cl. G01R 31/28 (2006.01)
CPC G01R 31/2872 (2013.01) [G01R 31/2858 (2013.01); G01R 31/2889 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A system for semiconductor device in-situ testing, the semiconductor device to be tested comprises a G terminal, a D terminal, and an S terminal, the system comprises: a static testing unit, a static testing channel, a dynamic testing unit, a dynamic testing channel, and a channel switching control unit;
the static testing unit, connected to the semiconductor device via the static testing channel, is used to output static testing signals and display the static testing data of the semiconductor device;
the dynamic testing unit, connected to the semiconductor device via the dynamic testing channel, is used to output dynamic testing signals and display the dynamic testing data of the semiconductor device;
the channel switching control unit is respectively connected with the static testing channel and the dynamic testing channel, and controls them; when the static testing channel is conducted, the dynamic testing channel is disconnected, and when the static testing channel is disconnected, the dynamic testing channel is conducted;
the static testing channel comprises a first channel, a second channel, and a third channel; the static testing unit is connected to the G terminal of the semiconductor device via the first channel, connected to the D terminal via the second channel, and the S terminal of the semiconductor device is grounded via the third channel; the first channel, the second channel, and the third channel are respectively connected to the channel switching control unit, and are controlled by the channel switching control unit to conduct or disconnect simultaneously;
the first channel, the second channel, and the third channel comprise transistors; the channel switching control unit comprises a signal generation module and an inverter circuit; the signal generation module is connected to a control terminal of the transistor via the inverter circuit; the signal generation module is used to output pulse signals of high level, low level, or square wave, and the inverter circuit inverts the pulse signals; the static testing unit is connected to the G terminal of the semiconductor device via the transistor of the first channel, and connected to the D terminal of the semiconductor device via the transistor of the second channel, and the S terminal of the semiconductor device is grounded via the transistor of the third channel.