US 12,146,235 B2
Plating and deplating currents for material co-planarity in semiconductor plating processes
Paul R. McHugh, Kalispell, MT (US); Charles Sharbono, Whitefish, MT (US); Jing Xu, Kalispell, MT (US); John L. Klocke, Kalispell, MT (US); Sam K. Lee, Kalispell, MT (US); and Keith Edward Ypma, Kalispell, MT (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Mar. 3, 2022, as Appl. No. 17/686,129.
Prior Publication US 2023/0279576 A1, Sep. 7, 2023
Int. Cl. C25D 5/18 (2006.01); C25D 5/02 (2006.01); C25D 7/12 (2006.01); C25D 17/00 (2006.01); C25D 21/12 (2006.01); G06F 30/20 (2020.01); H01L 21/768 (2006.01)
CPC C25D 5/18 (2013.01) [C25D 5/022 (2013.01); C25D 7/123 (2013.01); C25D 17/001 (2013.01); C25D 21/12 (2013.01); G06F 30/20 (2020.01); H01L 21/76898 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of plating substrates, the method comprising:
determining, for a plating process to be performed on a substrate, a relationship between a range nonuniformity of the plating process, and characteristics of the plating process and a pattern on the substrate;
determining a duty cycle for a forward plating current and a reverse deplating current from the relationship that minimizes the range nonuniformity;
placing the substrate in a plating chamber comprising a liquid, wherein the substrate comprises a patterned mask that exposes the substrate through a plurality of vias; and
applying a current to the liquid in the plating chamber to deposit a metal on exposed portions of the substrate, wherein the current comprises the duty cycle comprising alternating cycles of:
the forward plating current that deposits the metal unevenly in the plurality of vias at varying heights; and
the reverse deplating current that removes some of the metal in the plurality of vias such that the metal in the plurality of vias is evenly distributed.