US 12,477,910 B2
Display panel and method of manufacturing the same, display apparatus
Dongfang Yang, Beijing (CN); Yao Huang, Beijing (CN); Yue Long, Beijing (CN); Zhuoran Yan, Beijing (CN); Benlian Wang, Beijing (CN); Yuanjie Xu, Beijing (CN); and Binyan Wang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and Beijing BOE Technology Development Co., Ltd., Beijing (CN)
Appl. No. 18/250,781
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Mar. 1, 2022, PCT No. PCT/CN2022/078680
§ 371(c)(1), (2) Date Apr. 27, 2023,
PCT Pub. No. WO2023/164815, PCT Pub. Date Sep. 7, 2023.
Prior Publication US 2024/0324336 A1, Sep. 26, 2024
Int. Cl. G09G 3/32 (2016.01); H10K 59/12 (2023.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 59/35 (2023.01); H10K 59/65 (2023.01)
CPC H10K 59/131 (2023.02) [H10K 59/1201 (2023.02); H10K 59/121 (2023.02); H10K 59/351 (2023.02); H10K 59/353 (2023.02); H10K 59/65 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display panel having a display region; the display region including a first region and a second region that are non-overlapping with each other, and the first region including a plurality of sub-pixel regions; the display panel comprising:
a substrate;
an insulating layer disposed on the substrate; the insulating layer having at least one via hole in a sub-pixel region;
a metal layer disposed on a side of the insulating layer away from the substrate; the metal layer covering an inner wall of the at least one via hole;
a first transparent conductive layer disposed on a side of the metal layer away from the substrate; wherein the first transparent conductive layer includes a plurality of first transparent conductive lines that are arranged in a first direction and spaced apart from one another; a first transparent conductive line extends from a first sub-pixel region to the second region through a second sub-pixel region, and the first sub-pixel region and the second sub-pixel region are each one of the plurality of sub-pixel regions; the insulating layer has at least one via hole in the second sub-pixel region, and the metal layer covers an inner wall of the at least one via hole in the second sub-pixel region; and
a second transparent conductive layer disposed on a side of the first transparent conductive layer away from the substrate; wherein the second transparent conductive layer includes a plurality of second transparent conductive lines that are arranged in the first direction and spaced apart from one another; a second transparent conductive line extends from a third sub-pixel region to the second region through a fourth sub-pixel region, and the third sub-pixel region and the fourth sub-pixel region are each one of the plurality of sub-pixel regions; the insulating layer has at least one via hole in the fourth sub-pixel region, and the metal layer covers an inner wall of the at least one via hole in the fourth sub-pixel region;
wherein a total overlapping area between an orthographic projection of the first transparent conductive line on the substrate and orthogonal projections, on the substrate, of all via holes, in the second sub-pixel region, of the insulating layer is less than a total overlapping area between an orthographic projection of the second transparent conductive line on the substrate and orthogonal projections, on the substrate, of all via holes, in the fourth sub-pixel region, of the insulating layer.