| CPC H10D 89/60 (2025.01) [H02H 9/046 (2013.01)] | 20 Claims |

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1. A semiconductor device for protecting an internal circuit, comprising:
a transistor, comprising a gate terminal, a source terminal, and a drain terminal, wherein the gate terminal is coupled to a ground, the source terminal is coupled to the internal circuit, and the drain terminal is coupled to an input/output pad, wherein when the input/output pad receives an ESD current generated due to electrostatic discharge, the transistor expels the ESD current so that the ESD current IESD does not flow through the internal circuit to damage the internal circuit;
a first doping region, having a first conductive type; and
a second doping region, having a second conductive type, wherein the first doping region is adjacent to the second doping region, wherein a first interconnect structure electrically connects the first doping region and the second doping region to a gate electrode, wherein the first conductive type is different from the second conductive type.
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